Consider the most common way of representing numbers in modern processors — binary code. The numbers stored in the processor registers in a fixed length. Each register is composed of flip-flops that can store one bit of information (a value of 0 or 1). Accordingly, the processor natural number system is binary. Also for compact representation the hexadecimal numbers can be used, and for normal human kind is easy to use decimal. It is recommended to recall how they are formed, because on all three notations will be used throughout.
Standard length register — 8, 16, 24, 32, but other values are possible. Look at how the positive integers will be presented in 8 bit register.
Binary | Decimal | Hexadecimal |
0000 0000 | 0 | 00 |
0000 0001 | 1 | 01 |
0000 0010 | 2 | 02 |
0000 0011 | 3 | 03 |
... | ... | ... |
0000 1000 | 8 | 08 |
0000 1001 | 9 | 09 |
0000 1010 | 10 | 0A |
... | ... | ... |
0000 1111 | 15 | 0F |
0001 0000 | 16 | 10 |
... | ... | ... |
1111 1110 | 254 | FE |
1111 1111 | 255 | FF |
The maximum number is limited by register length. For example, for register with 8 bits length, the maximum number is 1111 1111 (blank is placed for clarity), which translated into a decimal system would be 255.
In two's-complement representation, positive numbers are simply represented as themselves, and negative numbers are represented by the two's complement of their absolute value. The two's complement of an N-bit number is defined as the complement with respect to 2N; in other words, it is the result of subtracting the number from 2N.
For example, if a register is an 8 bits wide, a code is considered a supplement to 256 (
| Negative Number | Calculation | Decimal | Binary | Hexadecimal |
| −1 | 256−1 | 255 | 1111 1111 | FF |
| −2 | 256−2 | 254 | 1111 1110 | FE |
... | ... | ... | ... | ... |
| −127 | 256−127 | 129 | 1000 0001 | 81 |
| −128 | 256−128 | 128 | 1000 0000 | 80 |
If we continue on the table, then we get to zero again.
| Negative Number | Calculation | Decimal | Binary | Hexadecimal |
| −129 | 256−129 | 127 | 0111 1111 | 7F |
... | ... | ... | ... | ... |
| −254 | 256−254 | 2 | 0000 0010 | 2 |
| −255 | 256−255 | 1 | 0000 0001 | 1 |
| −256 | 256−256 | 0 | 0000 0000 | 0 |
It turns out that one and the same 8-bit register may store the same number as the positive from 0 to 255, and negative from −1 to −256.
To represent both positive and negative numbers, the entire range is divided into two parts. Smaller numbers from 0 to 127 are positive values, and the biggest from 128 to 255 are negative numbers.
The result is that a single 8-bit register can store an unsigned number in the range from 0 to 255, and the signed numbers in the -128 to 127 range.
Look at how to perform arithmetic operations on unsigned numbers on the example of the addition operation. Addition is performed on the registers of the same length (A and B) and, if the result of addition is not fit in the register of the same length (S), then the processor sets the carry bit (C), and the result is truncated into register length. In fact, the result register (S) is extended by one bit by the carry bit (C), and contains the correct result.
| A | B | C | S | Result |
1000 0000 (128) | 0111 1111 (127) | 0 | 1111 1111 | 0 1111 1111 (255) |
1000 0000 (128) | 1000 0000 (128) | 1 | 0000 0000 | 1 0000 0000 (256) |
Let's look how to perform addition with signed numbers.
| A | B | C | S | Result |
1000 0000 (−128) | 0111 1111 (127) | 0 | 1111 1111 | 0 1111 1111 (−1) |
1000 0000 (−128) | 1000 0000 (−128) | 1 | 0000 0000 | 1 0000 0000 (0) |
Looking carefully at the input and output values, we can see that the actions of the bits made equally for both signed and unsigned numbers. That is, for the addition operation signed and unsigned integers used the same algorithm (hardware). It should be noted that not all arithmetic operations perform signed or unsigned numbers operations equally.
For example, when signed right shift of a negative number performed, the high bit is set to 1, to remain the number negative.
Signed right shift | 1000 0000 (128) | 0100 0000 (64) |
Unsigned right shift | 1000 0000 (−128) | 1100 0000 (−64) |
For many arithmetic and logical operations does not matter what type (signed or unsigned) is the number in the register, which allows to reduce the complexity of hardware using the two's complement code.